Resistance to Soldering Heat Testing for Electronic Components: Standards, Methods, and Evaluation

Resistance to soldering heat testing is a critical reliability test that verifies whether electronic components can withstand the thermal stress imposed by wave soldering, reflow soldering, and hand soldering processes without degradation or damage. Performed in accordance with international standards such as IEC 60068-2-20 and IEC 60068-2-58, this test exposes components to controlled high-temperature soldering conditions and evaluates their electrical, mechanical, and visual integrity afterward. This article provides a comprehensive technical overview of the test principles, applicable standards, sample types, test methods, and acceptance criteria used by accredited third-party laboratories.

Technical Overview

During PCB assembly, electronic components experience brief but intense thermal shock. Molten solder baths typically operate at 260 °C, soldering irons at 350 °C, and lead-free reflow ovens reach peak temperatures of 245 °C to 260 °C. These temperatures approach or exceed the limits of many dielectric materials, encapsulants, internal junctions, and termination structures. The resistance to soldering heat test, also known as Test Tb under IEC 60068-2-20, is designed to simulate these production stresses in a controlled laboratory environment and to confirm that a component survives the soldering operation with its form, fit, and function intact.

The test is distinct from solderability testing, which assesses whether terminations can be properly wetted by molten solder. Resistance to soldering heat testing instead focuses on the survival of the component body and its internal structure under thermal load. It is routinely specified in component detail specifications, procurement documents, and qualification programs across the automotive, aerospace, industrial, telecom, and consumer electronics industries.

The principal standards governing this test include:

• IEC 60068-2-20 – Environmental testing, Test Tb: methods for testing resistance to soldering heat for leaded (through-hole) components using a solder bath, soldering iron, or vapor phase technique.
• IEC 60068-2-58 – Test Td: robustness of terminations for surface-mount devices (SMD) subjected to soldering heat using reflow and dip methods.
• IPC/JEDEC J-STD-020 – Moisture/reflow sensitivity classification for non-hermetic solid-state SMD packages, widely referenced for lead-free reflow profiles.
• MIL-STD-202 (Method 210A) and MIL-STD-883/750 series – Soldering-related test methods used in military and high-reliability programs.
• GB/T 2423.28 – The Chinese national standard harmonized with IEC 60068-2-20.
• JIS C 60068-2-20 – The Japanese national adoption of the corresponding IEC test method.

Testing Samples

Resistance to soldering heat testing applies to virtually every component type intended for solder attachment to a printed circuit board. Sample preparation, quantity, and mounting configuration depend on the component construction and the applicable detail specification.

Through-Hole Leaded Components

Axial and radial leaded parts such as carbon film and metal film resistors, ceramic and electrolytic capacitors, inductors, diodes, small-signal transistors, DIP and SIP integrated circuits, electrolytic capacitors, relays, and connectors are tested by dipping their leads and a defined portion of the component body into a molten solder bath. The immersion depth is carefully controlled so that the thermal stress is applied reproducibly, typically up to a point 2 mm to 3 mm from the component body or to a plane defined in the detail specification.

Surface-Mount Devices (SMD)

Chip resistors, MLCC capacitors, tantalum capacitors, SOT packages, SOIC, QFP, QFN, BGA, LGA, and leadless molded components are evaluated using reflow simulation or solder bath dip in accordance with IEC 60068-2-58 or J-STD-020. Because surface-mount parts experience the entire reflow temperature profile on their whole body rather than localized lead heating, the test assesses package robustness, delamination resistance, popcorn cracking, and interconnect integrity.

Semiconductors and Integrated Circuits

Discrete semiconductors, power devices, optocouplers, and ICs in plastic, ceramic, or hermetic metal packages receive particular attention because die attach, wire bonds, and molding compounds are sensitive to thermal excursion. For moisture-sensitive devices, preconditioning per J-STD-020 or J-STD-033 may be applied before the soldering heat exposure to replicate worst-case factory handling.

Passive and Electromechanical Components

Ferrite beads, transformers, crystals, oscillators, switches, sockets, and relay components are also tested. For these products, additional attention is given to glass-to-metal seals, resin impregnation, plastic housings, and marking legibility after thermal exposure.

Testing Items

Following the thermal exposure and a defined recovery period, samples are examined against the pass/fail criteria established in the relevant specification. Typical evaluation items include:

• Visual and dimensional examination – Inspection under magnification (typically 10×) for cracks, blisters, delamination, deformation, resin softening, loss of marking legibility, and damage to terminations or coating.
• Electrical performance verification – Re-measurement of key parameters such as resistance, capacitance, dissipation factor, leakage current, forward voltage, insulation resistance, and functional behavior against pre-test values; drift limits are defined by the detail specification.
• Mechanical integrity checks – Lead pull and bend tests, termination adhesion, and torque or insertion force tests where specified, to confirm that leads and terminations remain securely attached.
• Seal and hermeticity tests – Fine and gross leak testing for sealed or hermetic packages where applicable.
• Internal structure analysis – For qualification or failure analysis programs, acoustic microscopy (C-SAM), X-ray inspection, cross-sectioning, or scanning electron microscopy may be used to detect internal delamination, voids, wire bond damage, or die attach degradation.

Testing Methods

Method 1: Solder Bath (Dip) Immersion

The most widely applied procedure immerses the component terminations into a static, agitated, or flowing solder bath held at 260 °C ± 5 °C. Prior to immersion, the leads are cleaned and coated with a controlled quantity of rosin-based flux as defined in the standard. The sample is then dipped to the specified depth for a dwell time of 5 s ± 1 s or 10 s ± 1 s, selected according to the component specification. The solder bath immersion method reproduces the thermal shock of wave soldering with high reproducibility and is the reference method of IEC 60068-2-20 Test Tb.

Method 2: Soldering Iron Application

For components that in service will be attached by hand soldering, or whose geometry makes bath immersion impractical, a temperature-controlled soldering iron rated at 350 °C ± 10 °C is applied to the termination for 3.5 s ± 0.5 s or 5 s ± 1 s. Iron tip size, applied force, and placement point are specified to ensure consistency. This method is often used for large components, cable assemblies, and hardware items.

Method 3: Vapor Phase (Condensation) Heating

The component is suspended in the saturated vapor of a boiling fluorocarbon or equivalent inert fluid, subjecting the entire body to a rapid, uniform temperature rise. This approach is suitable for components that are sensitive to the mechanical action of bath immersion but still require whole-body heating.

Reflow Simulation for Surface-Mount Devices

SMD packages are subjected to a complete reflow temperature profile in a controlled oven, or alternatively dipped in a solder bath at 260 °C or 280 °C for 10 s in accordance with IEC 60068-2-58. Conventional reflow profiles use a peak of 235 °C, while lead-free profiles use peaks of 250 °C or, under J-STD-020 classification, up to 260 °C, with controlled ramp rates and time above liquidus. For moisture-sensitive packages, preconditioning at 85 °C/85 %RH followed by three reflow excursions is a common worst-case sequence.

Test Sequence and Conditioning

• Initial inspection and measurement of electrical parameters under standard atmospheric conditions (typically 15 °C to 35 °C, 45 % to 75 % RH, 86 kPa to 106 kPa).
• Aging or preconditioning where required by the detail specification.
• Application of flux and solder alloy as specified (for example, tin-lead alloys per ISO 9453 or lead-free SAC alloys for RoHS-compliant evaluation).
• Thermal exposure by the selected method.
• Recovery period, generally 24 h under standard atmospheric conditions, allowing internal stresses and absorbed heat to equilibrate.
• Final visual, dimensional, electrical, and mechanical evaluation and comparison against acceptance criteria.

Applications

Resistance to soldering heat testing is embedded throughout the electronics supply chain wherever solder attachment reliability matters:

• Component qualification and release – Semiconductor and passive component manufacturers run the test as part of new product qualification, periodic requalification, and process change notification (PCN) validation.
• Incoming inspection and supplier evaluation – EMS providers and OEMs use the test to verify that purchased lots will survive their specific soldering processes, particularly when converting lines between tin-lead and lead-free profiles.
• Automotive electronics – Under AEC-Q100, AEC-Q101, and AEC-Q200 qualification frameworks, soldering heat endurance is a mandatory stress preceding subsequent reliability testing.
• High-reliability and aerospace programs – Military, space, and avionics specifications derived from MIL-STD-883, MIL-STD-750, and ESCC documents require demonstration of survival under both conventional and rework soldering conditions.
• Failure analysis and process troubleshooting – When cracking, delamination, or parameter drift occurs during production, the test provides a controlled means of reproducing and diagnosing thermal overstress mechanisms.
• RoHS and lead-free transition validation – Higher lead-free process temperatures are assessed through J-STD-020 classification to establish floor life, bake requirements, and reflow limits for moisture-sensitive devices.

FAQ

What is the difference between solderability testing and resistance to soldering heat testing?

Solderability testing (for example, IEC 60068-2-20 Test Ta or IEC 60068-2-69) evaluates how well a termination is wetted by molten solder and addresses joint formation quality. Resistance to soldering heat testing (Test Tb) evaluates whether the component itself survives the heat of the soldering process without cracking, delamination, or electrical degradation. Both tests are complementary and are usually performed on the same component family during qualification.

What temperature and dwell time are used in the standard solder bath method?

The reference condition of IEC 60068-2-20 Test Tb Method 1 is a solder bath at 260 °C ± 5 °C with a dwell time of 10 s ± 1 s (or 5 s ± 1 s when specified). The soldering iron method uses 350 °C ± 10 °C for 3.5 s or 5 s. Surface-mount reflow simulations extend peak temperatures to 235 °C, 250 °C, or 260 °C depending on the profile selected.

Which standard applies to surface-mount components?

For SMD terminations and packages, IEC 60068-2-58 (Test Td) covers dip and reflow methods for soldering heat robustness, while IPC/JEDEC J-STD-020 defines the reflow sensitivity classification profiles widely used for plastic packages, including lead-free conditions. The applicable choice is defined in the component procurement specification.

How many samples are required?

Sample quantity is defined by the relevant detail specification or qualification plan. Typical lot-based procedures use small statistically defined samples for periodic testing, whereas full qualification may require larger sample groups distributed across test methods and measured before and after exposure.

What are the most common failure modes observed?

Typical failures include ceramic body cracking from thermal shock, molding compound delamination and popcorn cracking in moisture-laden plastic packages, lead or termination separation, softening or melting of internal solder joints, hermeticity loss in sealed packages, and out-of-tolerance drift of electrical parameters such as capacitance, resistance, or leakage current.

Can the test simulate lead-free RoHS soldering processes?

Yes. Lead-free SAC alloys and reflow profiles with peaks up to 260 °C can be applied under the relevant methods, and moisture sensitivity classification per J-STD-020 with preconditioning per J-STD-033 provides a recognized framework for evaluating packages under worst-case lead-free assembly conditions.

Is the test destructive?

Yes, in practice the exposure to soldering temperatures is considered a destructive or potentially destructive stress. Samples subjected to the test should not be returned to production use, and the test is normally performed on dedicated samples drawn from the same lot as production parts.

Where can this test be performed?

Accredited third-party laboratories, component manufacturer reliability labs, and OEM verification facilities routinely perform resistance to soldering heat testing under ISO/IEC 17025-accredited quality systems, providing test reports that document the method, conditions, sample identification, and conformance to the specified acceptance criteria.